Profile
Joined February 24, 2023
Flag user
0xEFc...22FA
Accuracy
96.65%
Agreed w/ consensus
232,944
Disagreed w/ consensus
8,068
239,039 votes
Subject | vote | Consensus |
|---|---|---|
US Patent 20210066318 Analog Non-Volatile Memory Device Using Poly Ferrorelectric Film with Random Polarization Directions | Accept | Accepted ↗ |
US Patent 20210066309 METHODS AND APPARATUS FOR SMOOTHING DYNAMIC RANDOM ACCESS MEMORY BIT LINE METAL | Accept | Accepted ↗ |
US Patent 20210066299 FEEDBACK 1T DRAM DEVICE HAVING LOCALIZED PARTIAL INSULATING LAYERS | Accept | Accepted ↗ |
US Patent 20210066268 MASK TRANSFER METHOD (AND RELATED APPARATUS) FOR A BUMPING PROCESS | Accept | Accepted ↗ |
US Patent 20210066258 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Accept | Accepted ↗ |
US Patent 20210066249 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Accept | Accepted ↗ |
US Patent 20210066236 SEMICONDUCTOR APPARATUS | Accept | Accepted ↗ |
US Patent 20210066226 ELECTRICAL DEVICES, SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAME | Accept | Accepted ↗ |
US Patent 20210066217 PACKAGED INTEGRATED CIRCUIT HAVING STACKED DIE AND METHOD FOR MAKING | Accept | Accepted ↗ |
US Patent 20210066206 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES | Accept | Accepted ↗ |
US Patent 20210066196 MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND A COMMON PLATE | Accept | Accepted ↗ |
US Patent 20210066187 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE | Accept | Accepted ↗ |
US Patent 20210066177 DEVICE COMPRISING FIRST SOLDER INTERCONNECTS ALIGNED IN A FIRST DIRECTION AND SECOND SOLDER INTERCONNECTS ALIGNED IN A SECOND DIRECTION | Accept | Accepted ↗ |
US Patent 20210066168 PACKAGE AND MANUFACTURING METHOD THEREOF | Accept | Accepted ↗ |
US Patent 20210066150 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR ELEMENT | Accept | Accepted ↗ |
US Patent 20210066140 SEMICONDUCTOR DEVICE MANUFACTURING SYSTEM, SEMICONDUCTOR DEVICE INSPECTION DEVICE, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | Accept | Accepted ↗ |
US Patent 20210066122 Amorphous Layers for Reducing Copper Diffusion and Method Forming Same | Accept | Accepted ↗ |
US Patent 20210066104 SEMICONDUCTOR FABRICATION SYSTEM AND METHOD | Accept | Accepted ↗ |
Ivan Alborghetti | Accept | Accepted ↗ |
US Patent 20210066084 METHOD FOR DEPOSITING A MATERIAL FILM ON A SUBSTRATE WITHIN A REACTION CHAMBER BY A CYCLICAL DEPOSITION PROCESS AND RELATED DEVICE STRUCTURES | Accept | Accepted ↗ |
US Patent 20210066318 Analog Non-Volatile Memory Device Using Poly Ferrorelectric Film with Random Polarization Directions
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066309 METHODS AND APPARATUS FOR SMOOTHING DYNAMIC RANDOM ACCESS MEMORY BIT LINE METAL
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066299 FEEDBACK 1T DRAM DEVICE HAVING LOCALIZED PARTIAL INSULATING LAYERS
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066268 MASK TRANSFER METHOD (AND RELATED APPARATUS) FOR A BUMPING PROCESS
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066258 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066249 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066226 ELECTRICAL DEVICES, SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAME
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066217 PACKAGED INTEGRATED CIRCUIT HAVING STACKED DIE AND METHOD FOR MAKING
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066206 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066196 MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND A COMMON PLATE
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066187 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066177 DEVICE COMPRISING FIRST SOLDER INTERCONNECTS ALIGNED IN A FIRST DIRECTION AND SECOND SOLDER INTERCONNECTS ALIGNED IN A SECOND DIRECTION
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066168 PACKAGE AND MANUFACTURING METHOD THEREOF
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066150 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR ELEMENT
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066140 SEMICONDUCTOR DEVICE MANUFACTURING SYSTEM, SEMICONDUCTOR DEVICE INSPECTION DEVICE, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066122 Amorphous Layers for Reducing Copper Diffusion and Method Forming Same
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066104 SEMICONDUCTOR FABRICATION SYSTEM AND METHOD
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point
US Patent 20210066084 METHOD FOR DEPOSITING A MATERIAL FILM ON A SUBSTRATE WITHIN A REACTION CHAMBER BY A CYCLICAL DEPOSITION PROCESS AND RELATED DEVICE STRUCTURES
vote
Accept
Consensus
Accepted ↗
REWARD/PENALTY
+1 point